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   &#160;<span id="projectnumber">0.3</span>
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   <div id="projectbrief">A system-level modeling framework for designing real-time embedded systems</div>
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<div class="title">Package SystemSharp.Components.Std</div>  </div>
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Classes</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_a_l_u.html">ALU</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Provides a synthesizable implementation of an arithmetic-logical unit (<a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_a_l_u.html" title="Provides a synthesizable implementation of an arithmetic-logical unit (ALU). It is intended to be use...">ALU</a>). It is intended to be used during high-level synthesis for mapping basic arithmetic/logical instructions.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_a_l_u.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_a_l_u_x_i_l_mapping.html">ALUXILMapping</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Represents a mapping of a XIL instruction to an <a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_a_l_u.html" title="Provides a synthesizable implementation of an arithmetic-logical unit (ALU). It is intended to be use...">ALU</a>  <a href="class_system_sharp_1_1_components_1_1_std_1_1_a_l_u_x_i_l_mapping.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_a_l_u_x_i_l_mapper.html">ALUXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Implements a service for mapping XIL instructions to arithmetic-logical units (i.e. instances of <a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_a_l_u.html" title="Provides a synthesizable implementation of an arithmetic-logical unit (ALU). It is intended to be use...">ALU</a>)  <a href="class_system_sharp_1_1_components_1_1_std_1_1_a_l_u_x_i_l_mapper.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_a_l_u_func_sel_extension.html">ALUFuncSelExtension</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_b_c_u_transaction_site.html">IBCUTransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface of branch control unit (<a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_b_c_u.html" title="A synthesizable implementation of a branch control unit. It is intended to be used during high-level ...">BCU</a>)  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_b_c_u_transaction_site.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_b_c_u_mapper.html">BCUMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Implements a service for mapping XIL instructions to branch control units (i.e. instances of <a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_b_c_u.html" title="A synthesizable implementation of a branch control unit. It is intended to be used during high-level ...">BCU</a>).  <a href="class_system_sharp_1_1_components_1_1_std_1_1_b_c_u_mapper.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_b_c_u.html">BCU</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A synthesizable implementation of a branch control unit. It is intended to be used during high-level synthesis for mapping branch instructions.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_b_c_u.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_r_o_m.html">IROM</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generic register transfer level interface for read-only memory  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_r_o_m.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_r_o_m_contract_class.html">ROMContractClass</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_r_a_m.html">IRAM</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generic register transfer level interface for random access memory  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_r_a_m.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_r_a_m_contract_class.html">RAMContractClass</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_block_mem_factory.html">IBlockMemFactory</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Factory pattern for creating implementations of ROM/RAM components  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_block_mem_factory.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_r_o_m.html">ROM</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A simple <a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_r_o_m.html" title="A simple ROM implementation which supports simulation and synthesizable HDL generation. ">ROM</a> implementation which supports simulation and synthesizable HDL generation.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_r_o_m.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_simple_d_p_r_a_m.html">SimpleDPRAM</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A simple dual-ported RAM implementation which supports simulation and synthesizable HDL generation. It provides separate read and write ports, but does not support conccurent reads or concurrent writes.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_simple_d_p_r_a_m.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_clock.html">Clock</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A standard clock driver implementation which supports simulation and generation of simulative HDL for testbench-based verification. It attaches a <code>ClockSpecAttribute</code> to identify the driven signal as clock signal. This is espcially useful for creating Xilinx user constraints files (UCF) from the design.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_clock.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_concat_transactor.html">IConcatTransactor</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface of <code><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_concatenizer.html" title="A synthesizable implementation of a bit-vector concatenating unit. It is intended to be used during h...">Concatenizer</a></code>  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_concat_transactor.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_concatenizer.html">Concatenizer</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A synthesizable implementation of a bit-vector concatenating unit. It is intended to be used during high-level synthesis for mapping concat instructions.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_concatenizer.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_concatenizer_x_i_l_mapper.html">ConcatenizerXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Implements a service for mapping concatenation-kind XIL instructions to the <code><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_concatenizer.html" title="A synthesizable implementation of a bit-vector concatenating unit. It is intended to be used during h...">Concatenizer</a></code>.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_concatenizer_x_i_l_mapper.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_console_logger_3_01_t_01_4.html">ConsoleLogger&lt; T &gt;</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A simple diagnostic component which writes dumps its input signal value to the console upon each value change.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_console_logger_3_01_t_01_4.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_const_loading_transaction_site.html">ConstLoadingTransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site of <code>ConstLoader</code>  <a href="class_system_sharp_1_1_components_1_1_std_1_1_const_loading_transaction_site.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_const_loading_x_i_l_mapping.html">ConstLoadingXILMapping</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Describes a mapping for constant-loading operations  <a href="class_system_sharp_1_1_components_1_1_std_1_1_const_loading_x_i_l_mapping.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_const_loading_x_i_l_mapper.html">ConstLoadingXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping constant-loading XIL instructions to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_const_loading_x_i_l_mapper.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_signal_const_loading_x_i_l_mapper.html">SignalConstLoadingXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping constant-loading XIL instructions to hardware. As opposed to <code><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_const_loading_x_i_l_mapper.html" title="A service for mapping constant-loading XIL instructions to hardware. ">ConstLoadingXILMapper</a></code>, this <code>CreateSignalsForConstants</code> property is initialized to <code>true</code> by default.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_signal_const_loading_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_fixed_abs_transaction_site.html">IFixedAbsTransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface for <code><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_fixed_abs.html" title="Implements a synthesizable absolute value function for fixed-point arithmetic. The component is inten...">FixedAbs</a></code> which implements the absolute value function for fixed-point numbers.  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_fixed_abs_transaction_site.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_fixed_abs.html">FixedAbs</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Implements a synthesizable absolute value function for fixed-point arithmetic. The component is intended to be used during high-level synthesis for mapping basic arithmetic/logical instructions.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_fixed_abs.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_fixed_abs_x_i_l_mapper.html">FixedAbsXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the "abs" (absolute value) XIL instruction with fixed-point arithmetic to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_fixed_abs_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_float_neg_abs_transaction_site.html">IFloatNegAbsTransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface for <code><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_float_neg_abs.html" title="Provides a synthesizable implementation of negation and absolute value function for floating-point ar...">FloatNegAbs</a></code> which computes absolute value and negation of floating-point operands.  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_float_neg_abs_transaction_site.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_float_neg_abs.html">FloatNegAbs</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Provides a synthesizable implementation of negation and absolute value function for floating-point arithmetic. The component is intended to be used during high-level synthesis for mapping basic arithmetic/logical instructions.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_float_neg_abs.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_float_neg_abs_x_i_l_mapper.html">FloatNegAbsXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the "abs" (absolute value) and "neg" (negation) XIL instructions with floating-point arithmetic to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_float_neg_abs_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_float_sign_as_signed_transaction_site.html">IFloatSignAsSignedTransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface for <code><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_float_sign_as_signed.html" title="Provides a synthesizable implementation of the signum function for floating-point arithmetic...">FloatSignAsSigned</a></code>, a component for computing the sign of floating-point operands.  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_float_sign_as_signed_transaction_site.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_float_sign_as_signed.html">FloatSignAsSigned</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Provides a synthesizable implementation of the signum function for floating-point arithmetic. The result is returned as a signed fixed-point number (-1, 0 or 1) with configurable bit-width. The component is intended to be used during high-level synthesis for mapping basic arithmetic/logical instructions.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_float_sign_as_signed.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_float_sign_as_signed_x_i_l_mapper.html">FloatSignAsSignedXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the "sign" (signum) XIL instruction with floating-point arithmetic to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_float_sign_as_signed_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_f_p_mod1_transaction_site.html">IFPMod1TransactionSite</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_fix_f_p_mod1.html">FixFPMod1</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Given a fixed-point number x, this component computes the fixed-point modulus of x and 1.0: r = mod(x, 1.0) The modulus operation is generalized to fixed-point numbers in the following manner: r is a number such that r &gt;= -1 and r &lt;= 1 and x = k + r with k being an integer. The component is intended to be used during high-level synthesis for mapping basic arithmetic/logical instructions.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_fix_f_p_mod1.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_f_p_mod1_x_i_l_mapper.html">FPMod1XILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the "mod2" and "rempow2" (remainder function for constant divisors which are a power of 2) XIL instructions with fixed-point arithmetic to hardware. "rempow2" is not yet fully supported: the restriction is that the static operand must be 0, implying a divisor of 2^0 = 1.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_f_p_mod1_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_inline_b_c_u_mapper.html">InlineBCUMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping XIL branching instructions (goto, brtrue, brfalse) to an inline branch control unit (<a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_b_c_u.html" title="A synthesizable implementation of a branch control unit. It is intended to be used during high-level ...">BCU</a>). An inline <a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_b_c_u.html" title="A synthesizable implementation of a branch control unit. It is intended to be used during high-level ...">BCU</a> does not require a separate component instance. Instead, the necessary control logic is directly inserted into the hosting component.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_inline_b_c_u_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_inline_concat_mapper.html">InlineConcatMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the "concat" (bit-vector concatenation) XIL instruction to hardware. The service does not instantiate any extra component. Instead, the necessary code is directly inserted into the hosting component. It is supported to concatenate arbitrarily many signals with different bit-widths.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_inline_concat_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_inline_field_mapper.html">InlineFieldMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping XIL instructions which perform read/write accesses on fields to hardware. It does not instantiate any separate component instance. Instead, the control logic is directly inserted into the hosting component.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_inline_field_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_actual_type_attribute.html">ActualTypeAttribute</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">An instance of this class attached to a FieldDescriptor (as an attribute, using <code>AddAttribute</code>) indicates its actual type is different from its formal type: Let's assume the field is represented as an <code>StdLogicVector</code>, but it is interpreted as a fixed-point number. In that case, the actual type would be <code>SFix</code>, helping with the interpretation of the raw binary data, e.g. for meaningful diagnostic outputs.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_actual_type_attribute.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_inline_memory_mapper.html">InlineMemoryMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping XIL instructions which perform array accesses to hardware. The arrays are mapped to memory models. However, the service does not create any separate component instance. Instead, it inserts the memory models and the necessary control logic directly into the hosting component.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_inline_memory_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_l_e_r_p_unit.html">LERPUnit</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A unit for 1D linear interpolation over equidistant data points. A register transfer level interface to communicates with a separate memory block storing the data table is provided. Computation assumes fixed-point data.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_l_e_r_p_unit.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_l_e_r_p11_core.html">LERP11Core</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A unit for 1D linear interpolation over equidistant data points. A pre-initialized data table is stored internally. However, a register transfer level interface to internal memory is provided which allows to modify the data table during runtime. Computation assumes fixed-point data.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_l_e_r_p11_core.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_sin_cos_transaction_site.html">ISinCosTransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface for sine, cosine and parallel sine/cosine functions  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_sin_cos_transaction_site.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_sin_cos_l_u_t_core.html">SinCosLUTCore</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Provides a synthesizable implementation of sine and cosine functions, using linear interpolation in fixed-point arithmetic. Operand is specified in scaled radians and must be in range between -1 and 1 (with -1 corresponding to -PI, 1 corresponding to PI). The component is intended to be used by high-level synthesis to map trigonometric functions.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_sin_cos_l_u_t_core.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_sin_cos_x_i_l_mapper.html">SinCosXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the scsincos (parallel sine/cosine over scaled radians) XIL instruction to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_sin_cos_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_local_storage_unit_transaction_site.html">ILocalStorageUnitTransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface for mapping read/write accesses to local variables  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_local_storage_unit_transaction_site.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_variable_data_trace_provider.html">IVariableDataTraceProvider</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Preliminary interface for once-contrived-but-never implemented verification concept. Please ignore.  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_variable_data_trace_provider.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_registered_variable.html">RegisteredVariable</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attached to a field, this attribute indicates that the hardware implementation of that variable must not have "write-through" semantics. I.e. the variable must not be written and then read within the same clock step.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_registered_variable.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_feed_thru_variable.html">FeedThruVariable</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attached to a field, this attribute indicates that the hardware implementation of that variable must have "write-through" semantics. I.e. the variable can be written and then read within the same clock step.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_feed_thru_variable.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit_transaction_site.html">LocalStorageUnitTransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site implementation for <code><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit.html" title="Implements a register with optional write-through semantics, i.e. input is directly passed to output ...">LocalStorageUnit</a></code>  <a href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit_transaction_site.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit.html">LocalStorageUnit</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Implements a register with optional write-through semantics, i.e. input is directly passed to output upon write access. The component is intended to be used by high-level synthesis for mapping variables to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit_read_mapping.html">LocalStorageUnitReadMapping</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Describes a hardware-mapped read access to a variable  <a href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit_read_mapping.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit_write_mapping.html">LocalStorageUnitWriteMapping</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Describes a hardware-mapped write access to a variable.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit_write_mapping.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit_x_i_l_mapper.html">LocalStorageUnitXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping XIL instructions which read or write variables to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_local_storage_unit_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_m_u_x2_transaction_site.html">IMUX2TransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface for multiplexing two operands based on a select sgnal.  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_m_u_x2_transaction_site.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_m_u_x2.html">MUX2</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Implements a multiplexer with two inputs. The component is intended to be used by high-level synthesis for mapping "select" instructions to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_m_u_x2.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_m_u_x2_mapper.html">MUX2Mapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the "select" XIL instruction to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_m_u_x2_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_nop_mapper.html">NopMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the "nop" XIL instruction to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_nop_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_direct_port_read_transaction_site.html">DirectPortReadTransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site for implementing port-read accesses.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_direct_port_read_transaction_site.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_direct_port_read_x_i_l_mapping.html">DirectPortReadXILMapping</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A mapping of the "rdport" XIL instruction to a <code><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_direct_port_read_transaction_site.html" title="Transaction site for implementing port-read accesses. ">DirectPortReadTransactionSite</a></code>  <a href="class_system_sharp_1_1_components_1_1_std_1_1_direct_port_read_x_i_l_mapping.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_port_reader_x_i_l_mapper.html">PortReaderXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the "rdport" XIL instruction to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_port_reader_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_port_writer_site.html">IPortWriterSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface for mapping port write accesses  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_port_writer_site.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_port_writer.html">IPortWriter</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interface definition for a component which writes to a port  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_port_writer.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_port_writer_3_01_t_01_4.html">PortWriter&lt; T &gt;</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Abstract base implementation of a component which writes to a port.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_port_writer_3_01_t_01_4.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_int_port_writer.html">IntPortWriter</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A port writer implemented for <code>int</code>-typed ports.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_int_port_writer.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_float_port_writer.html">FloatPortWriter</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A port writer implementation for <code>float</code>-typed ports.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_float_port_writer.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_double_port_writer.html">DoublePortWriter</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A port writer implementation for <code>double</code>-typed ports.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_double_port_writer.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_s_l_v_port_writer.html">SLVPortWriter</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A port writer implementation for <code>StdLogicVector</code>-typed ports.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_s_l_v_port_writer.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_s_l_port_writer.html">SLPortWriter</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A port writer implementation for <code>StdLogic</code>-typed ports.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_s_l_port_writer.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_port_writer_site_3_01_t_01_4.html">PortWriterSite&lt; T &gt;</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site implementation for write accesses to ports.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_port_writer_site_3_01_t_01_4.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_port_writer_x_i_l_mapping.html">PortWriterXILMapping</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Describes a mapping of the "wrport" XIL instruction to a port writer component.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_port_writer_x_i_l_mapping.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_inline_port_write_site.html">InlinePortWriteSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the "wrport" XIL instruction to an inline hardware implementation.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_inline_port_write_site.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_inline_port_writer_x_i_l_mapping.html">InlinePortWriterXILMapping</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Describes a mapping of the "wrport" XIL instruction to an inline hardware implementation.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_inline_port_writer_x_i_l_mapping.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_port_writer_x_i_l_mapper.html">PortWriterXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping the "wrport" XIL instruction to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_port_writer_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_reg_pipe.html">RegPipe</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift register implementation  <a href="class_system_sharp_1_1_components_1_1_std_1_1_reg_pipe.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_shifter_transactor.html">IShifterTransactor</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface for logical shift operations. Arithmetic shift is currently not supported.  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_shifter_transactor.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_shifter.html">Shifter</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A logical shift unit (arithmetic shifts not currently not supported).  <a href="class_system_sharp_1_1_components_1_1_std_1_1_shifter.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_shifter_x_i_l_mapper.html">ShifterXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping XIL instructions performing logical shifts to hardware. Arithmetic shifts are currently not supported.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_shifter_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">interface &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="interface_system_sharp_1_1_components_1_1_std_1_1_i_slicer_transaction_site.html">ISlicerTransactionSite</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transaction site interface for slicing operations (i.e. cutting out sub-vectors from a bit-vectors)  <a href="interface_system_sharp_1_1_components_1_1_std_1_1_i_slicer_transaction_site.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_slicer.html">Slicer</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A functional unit for performing slice operations on bit-vectors. The slice semantics are generalized in that it is possible to specify slice ranges which exceed the original operand bit-width. This way, the unit can be used for sign extension. This component is intended to be used during high-level synthesis for mapping basic arithmetic/logical instructions.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_slicer.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_system_sharp_1_1_components_1_1_std_1_1_slicer_x_i_l_mapper.html">SlicerXILMapper</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A service for mapping bit-slice XIL instructions to hardware.  <a href="class_system_sharp_1_1_components_1_1_std_1_1_slicer_x_i_l_mapper.html#details">More...</a><br/></td></tr>
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</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Copyright 2011-2013 Christian Köllner</p>
<p>This file is part of <a class="el" href="namespace_system.html">System</a>#.</p>
<p><a class="el" href="namespace_system.html">System</a># is free software: you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License (LGPL) as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version.</p>
<p><a class="el" href="namespace_system.html">System</a># is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.</p>
<p>You should have received a copy of the GNU General Public License along with <a class="el" href="namespace_system.html">System</a>#. If not, see <a href="http://www.gnu.org/licenses/lgpl.html">http://www.gnu.org/licenses/lgpl.html</a>. </p>
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